基于FPGA的SATA主机端控制器链路层发送模块设计

  • 张庆顺 ,
  • 刘赞 ,
  • 郭宝增 ,
  • 张锁良
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张庆顺(1979—),男,陕西汉中人,河北大学讲师,主要从事通信系统的研究. E-mail:87086486@qq.com

收稿日期: 2015-10-27

  网络出版日期: 2016-03-25

基金资助

河北省自然科学基金资助项目(F2011201045)

Design of FPGA-based SATA host controller in the link layer delivery

  • ZHANG Qingshun ,
  • LIU Zan ,
  • GUO Baozeng ,
  • ZHANG Suoliang
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  • Electronic Information Engineering College, Hebei University, Baoding 071002, China

Received date: 2015-10-27

  Online published: 2016-03-25

摘要

计算机系统中SATA(serial advanced technology attachment)主机端控制器采用专用总线转换芯片和软件控制方式.为使得以FPGA(field-programmable gate array)为控制核心的电子系统可以直接使用SATA3.0硬盘作为数据存储介质,借鉴ATA1-7、SATA1.0、SATA2.0、SATA3.0等相关协议,提出了一种基于FPGA的SATA3.0主机端控制器的链路层发送功能模块的设计与实现方法,成功实现了数据在发送过程中的校验、加扰以及流量控制等相关功能.仿真结果表明:本控制器数据处理速度可达600 MB/s,验证了设计的正确性.

本文引用格式

张庆顺 , 刘赞 , 郭宝增 , 张锁良 . 基于FPGA的SATA主机端控制器链路层发送模块设计[J]. 河北大学学报(自然科学版), 2016 , 36(2) : 218 -224 . DOI: 10.3969/j.issn.1000-1565.2016.02.018

Abstract

SATA(serial advanced technology attachment)3.0 disk as a data storage medium cannot be directly used in electronic systems represented by FPGA(Field-programmable gate array).Referring to ATA1-7,SATA serial advanced technology attachment 1.0,SATA2.0,SATA3.0 and other relavant protocols,this paper proposes a design and implementation method originated from SATA3.0 host controller which is based on FPGA in the link layer of sending module.This method is successfully implemented in sending data validation,scrambling and flowing control.Simulation results are also provided.The results show that the data processing speed of the controller is 600 MB/s which verify the success of the design.

参考文献

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