NMOS管交叉耦合的能量回收电路设计

doi:10.3969/j.issn.1000-1565.2016.03.017

河北大学学报(自然科学版) ›› 2016, Vol. 36 ›› Issue (3): 327-331.DOI: 10.3969/j.issn.1000-1565.2016.03.017

NMOS管交叉耦合的能量回收电路设计

师建英¹,许衍彬²,刘磊¹,门晋喜³

收稿日期:2015-01-22 出版日期:2016-05-25 发布日期:2016-05-25
作者简介:师建英(1979-),女,河北邯郸人,河北大学讲师,主要从事集成电路的设计及其性能研究. E-mail:hdsjy@126.com
基金资助:
国家杰出青年基金资助项目(61204079);河北省自然科学基金资助项目(F2013201196);保定市科学技术研究与发展指导计划项目(14GZ036);河北省科技计划自筹经费项目(15210409)

Energy recovery circuit based on NMOS transistor cross coupling logic

SHI Jianying¹,XU Yanbin²,LIU Lei¹,MEN Jinxi³

1.Electronic Information Engineering College, Hebei University, Baoding 071002, China; 2.Department of Electrical Engineering, Hebei College of Science and Technology, Baoding 071000, China; 3.Department of Radio Navigation, 95866 PLA Troops, Baoding 071051, China

Received:2015-01-22 Online:2016-05-25 Published:2016-05-25

摘要/Abstract

摘要： 对NMOS(N-metal oxide semiconductor)管交叉耦合逻辑(NMOS-transistor cross coupling logic,NCCL)的能量回收电路进行了研究,PMOS(P-metal oxide semiconductor)管作为输入管来降低纳米CMOS工艺中栅氧化层上的漏电流以减小功耗;在此基础上实现了绝热JK触发器电路.在90 nm CMOS BSIM3工艺模型下,用HSPICE对NCCL反相器及其JK触发器进行了模拟分析,结果表明NCCL反相器的工作频率可达到1 GHz;与ECRL(efficient charge recovery logic)反相器相比,当负载电容、时钟频率和电源电压中某一参数变化时,NCCL的功耗都出现不同程度的降低;在相同的工作条件下NCCL JK触发器的功耗约为ECRL 的50%.

关键词: NMOS管交叉耦合, NCCL, NCCL JK触发器, 低功耗

Abstract: The energy recovery circuit based on NMOS(N-Metal Oxide Semiconductor)-transistor cross coupling logic(NCCL)is studied.PMOS(P-Metal Oxide Semiconductor)transistors are used as the input tube to reduce the leakage current on the oxide gate layer in nanometer CMOS process.NCCL JK flip-flop is constructed by these techniques.The circuits are simulated by HSPICE in 90 nm CMOS BSIM3 process,and the simulation results show that NCCL inventor’s operation frequency can reach to 1 GHz. Compared with the ECRL(Efficient Charge Recovery Logic)inventor,when load capacity or clock frequency or power supply changes,the power consumptions of NCCL inventor decline to different degrees.In the same operate condition,the power consumption of NCCL JK flip-flop is about 50% of the ECRL JK flip-flop.

Key words: NMOS transistor cross coupling, NCCL, NCCL JK flip-flop, low power consumption

中图分类号:

TN432

师建英,许衍彬,刘磊,门晋喜. NMOS管交叉耦合的能量回收电路设计[J]. 河北大学学报(自然科学版), 2016, 36(3): 327-331.

SHI Jianying,XU Yanbin,LIU Lei,MEN Jinxi. Energy recovery circuit based on NMOS transistor cross coupling logic[J]. Journal of Hebei University (Natural Science Edition), 2016, 36(3): 327-331.

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NMOS管交叉耦合的能量回收电路设计

Energy recovery circuit based on NMOS transistor cross coupling logic

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