河北大学学报(自然科学版) ›› 2020, Vol. 40 ›› Issue (2): 218-224.DOI: 10.3969/j.issn.1000-1565.2020.02.016

• • 上一篇    

直接序列扩频伪码同步技术的研究与实现

张庆顺,于凯,张锁良   

  • 收稿日期:2019-05-12 出版日期:2020-03-25 发布日期:2020-03-25
  • 通讯作者: 张锁良(1966—),男,河北藁城人,河北大学教授,主要从事高速数据通信研究.E-mail: zhangsl@hbu.cn
  • 作者简介:张庆顺(1979—),男,陕西汉中人,河北大学讲师,主要从事高速数据通信研究. E-mail:87086486@qq.com
  • 基金资助:
    河北省军民融合专项项目(599704304)

Research and implementation of direct sequence spread spectrum pseudo-code synchronization technology

ZHANG Qingshun,YU Kai,ZHANG Suoliang   

  1. College of Electronic and Information Engineering, Hebei University, Baoding 071002, China
  • Received:2019-05-12 Online:2020-03-25 Published:2020-03-25

摘要: 在直接序列扩频通信系统中,要想将原始数据完整、准确、无误地解扩出来,伪码同步的准确性、及时性是至关重要的.因此,针对直接序列扩频通信中伪码的同步问题,本文结合常规的延迟锁相跟踪环和滑动相关法的理论,以 Xilinx 公司的 FPGA(现场可编程门阵列)为核心控制单元设计电路,基于延迟锁相环,实现了伪码的捕获与跟踪.测试结果表明:该系统方法能够稳定有效地实现伪码的捕获,并且能够及时准确地进行伪码的跟踪.

关键词: PN 码, 延时锁相环, 捕获, 跟踪, FPGA

Abstract: In the direct sequence spread spectrum communication system,in order to unravel the original data accurately and completely,the accuracy and timeliness of the pseudo code synchronization is very important.Therefore,for the synchronization problem of pseudo-code in direct sequence spread spectrum communication,this paper combines the theory of conventional delay-locked tracking loop and sliding correlation method to design the circuit with Xilinx FPGA as the core control unit,and the acquisition and tracking of pseudo code is realized based on delayed phase-locked loop.The test results show that the system method can realize the pseudo-code capture stably and effectively,and can track the pseudo-code in time and accurately.

Key words: PN code, delay phase-locked loop, capture, tracking, FPGA

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